In some applications, design engineers are finding a vibration or low audible hum coming from certain ceramic capacitors. This is sometimes described as a singing capacitor and is actually a piezoelectric effect. This FAQ will discuss some aspects of this “singing capacitor” phenomena.
A1. Singing is one of many ways to describe the piezoelectric effect on the capacitor. This “singing” is actually a vibration of the capacitor on the PCB that many occur under specific conditions.
A2. The piezoelectric effect occurs in ferroelectric capacitors (i.e. class II & III). Class I capacitors are not ferroelectric and therefore do not exhibit a piezoelectric effect. It is also important to understand that not all ferroelectric capacitors will experience a piezoelectric effect. A specific combination of component construction and circuit usage conditions must exist in order to cause the capacitor to vibrate or ring.
A3. There are several factors that contribute to the piezoelectric effect. There are contributing factors based on the design/construction of the MLCC, the electrical parameters of the MLCC, and the outside factors of the MLCC in circuit.
Design/construction contributors include the material dielectric constant, the number of active layers, the layer thickness, and the package size. Electrical contributors include DC bias.
Externally one of the most significant contributors is the application voltage and ripple current of the input signal. The threshold ripple is dependent on other external stresses applied to the MLCC. High temperature, for example, limits the ripple current capability of the MLCC and therefore can play a part in causing the capacitor to sing.
A4. Each of the factors discussed here play a role in contributing to the piezoelectric effect. All of these contributing factors affect the piezoelectricity differently. These factors can work together to increase or decrease the piezoelectric effect. Due to this complexity, there is no easy way to offer any design guide rules of thumb.
As an example, we can look at layer count. With all design factors being the same, a capacitor with higher layer count (layer # ratio) would result in greater piezoelectric amplitude. This is simply because the total amplitude is the combined effect of the amplitude of each layer.
Contributing factors can also offset or decrease the piezoelectric effect. For example, a higher dielectric constant can offset the effects of DC bias. This would result in lower piezoelectric amplitude.
The details and physics behind each combination of contributing factors are beyond the scope of this paper. It is important to remember that the piezoelectric effect will not manifest without the correct combination of external factors.
Most problems can be avoided if the Design Engineer can optimize the quality of the incoming signal as well as the environment surrounding the circuit. If a piezoelectric problem still exists, the Design Engineer then needs to look at component selection and design.
A5. When evaluating component selection and design, it can be helpful to compare some form of piezoelectric intensity between different components. Therefore, a measurement method is needed any relative comparison can be made.
The piezoelectric effect is actually a vibration of the capacitor. This vibration causes capacitor displacement as shown in figure 1. This displacement can be measured as amplitude.
Since the vibration and displacement occurs on such a relatively small scale, a non-contact method should be used to actually measure the displacement. A device such as a laser vibrometer (figure 2) allows for accurate non-contact displacement measurements to be made.
A6. Currently is no industry standardized method for reporting piezoelectric level. The piezoelectric effect occurs as the result of a combination of many variables. The correlation on the degree of one variable against others also adds a layer of complexity. The piezoelectricity can be measured but is only useful as a relative comparison between different measurements.
A7. Table 1 shows an example of non-contact measurements several MLCCs. These amplitudes are based on specific input test signals. The Engineer cannot make general assumptions based on these measurements alone.
As discussed earlier (in question #4) the higher the layer # ratio, the greater the piezoelectric amplitude. This is because the total amplitude is the combined amplitude of each layer. This does not always mean that different designs with the same layer # ration will necessarily perform the same.
Looking at a simple example in table 1 you find two MLCCs (#4 & #5) with the same layer # ratio. Although MLCC #4 has the same layer # ration as MLCC #5, the amplitude in MLCC # 5 is higher. In this example, this is because MLCC #5 has a lower layer thickness ratio.
|#||Item||dielectric constant||Layer # ratio||Layer Thickness Ratio||DV Bias Factor||Amplitude @ 1Vnms|
Looking at another example, the first three MLCCs in table 1 shows that MLCC #2 measures the greatest piezoelectric amplitude. If the design engineer used multiple capacitors, the ripple current would be distributed between the capacitors. To keep the math simple, assume 10 capacitors are used in parallel.
Using MLCC #1, ten 10µF MLCCs in parallel gives a nominal effective capacitance of 100µF. A DC bias factor of -90 means that 10% of the capacitance is available after DC voltage is applied. 10% of 100µF is 10µF. Distributing the impedance between the ten MLCCs (10 caps / effective capacitance) gives an amplitude scale factor of 1 and therefore the resultant amplitude would be 15nm.
It follows that MLCC #2 would yield an effective capacitance of 33µF. The amplitude scale factor is 10/33. By multiplying this scale factor with the measured amplitude in table 1 results in the resultant amplitude of 8nm.
MLCC #3 would yield an effective capacitance of 13µF. The amplitude scale factor is approximately 10/13 and therefore the amplitude would be (25/3) approximately 8.5nm.
Based on these calculations, MLCC #2 measured the highest in Table 1 but is our best choice in the design.
This example shows that although the piezoelectric amplitude can be measured, the value alone can not determine the effect on a circuit. Clearly, the circuit design also plays an important factor.
A8. The piezoelectric effect is the vibration. The singing effect occurs under certain conditions of vibration. If the vibration frequency occurs within the audible range (approximately 20Hz – 20kHz) then you may also hear an audible hum. When the MLCC is soldered to a circuit board or substrate, the intensity of the audible noise may also intensify. What you could basically end up with is a crude speaker or even a microphone in your circuit board.
A9. The engineer should determine if the vibration or humming is causing other problems in the overall system. For example, if the circuit is exhibiting a low frequency audible hum but will later be drowned out by the sound of a motor, the Engineer must decide if an improvement is necessary or not.
If the Engineer decides to improve the circuit, the first step is to look at reducing the ripple coming into the circuit. This will not only benefit the MLCC, but the entire circuit.
If ripple cannot be reduced, the Engineer can consider adding capacitors in parallel to distribute the ripple current or other stresses. It should be noted that this is not necessarily to increase bulk capacitance so the goal is not to simply provide the maximum capacitance value.
If the circuit does not require high capacitance then Class I (C0G) MLCC should be considered. Since Class I dielectrics are not ferroelectric, they will not exhibit the piezoelectric effect.
A10. There is currently no conclusive test data that would suggest any reliability risk. A MLCC that does not exhibit any piezo vibration will result in equal or better reliability compared to a MLCC that does exhibit piezo vibration.
MLCCs already possess superior reliability as compared to competing technology. MLCC qualification tests such as those suggested in the Automotive “AEC-Q200” specification includes tests based on the Military standard Mil-Std-202. These tests contain a variety of environmental, mechanical, and electrical stress tests. Among them are two tests in particular that test for mechanical shock (Mil-Std-202 method 213) and vibration (Mil-Std-202 method 204). These tests apply an external stress to ensure the MLCC will withstand external shock and vibration stresses.
For additional information that was referenced in this FAQ please see the following.
Ripple Current for MLCCs, TDK FAQ