Question 1

Flex Crack Countermeasures (1): What is meant by the term "flex crack"?

Accepted Answer

A. A flex crack refers to a crack formed by excess bending of an MLCC once it has been soldered onto a PCB (Print Circuit Board).

These cracks differ in appearance to cracks created by other means, such as impact or electrical overstress.

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Question 2

Flex Crack Countermeasures (2): Why do flex cracks occur?

Accepted Answer

A. The dielectric material in an MLCC is a ceramic compound. Ceramics, by nature, are brittle materials that are strong under compression, but weak under tension.

The ceramic's brittle nature does not allow for plastic deformation. If the mechanical stress induced on an MLCC is too great, the part will crack as a method of reducing this stress.

MLCCs will rarely crack during a concave bend of the PCB, because the forces exerted on the part are compressive during these bends (Figure 1).
MLCC's are very susceptible to cracking during a convex bend of the PCB, because the part is undergoing tension (Figure 2).

Figure 1: An MLCC on a PCB undergoing compressive forces due to a concave bend

Figure 2: An MLCC on a PCB undergoing tensile forces due to a convex bend

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Question 3

Flex Crack Countermeasures (3): What does a flex crack look like?

Accepted Answer

A. The signature flex crack is sometimes referred to as a "45°crack". These cracks originate near the start of the termination (the origin of stress on the part) on the mounted side of the MLCC and continue upwards at a 45° angle (the direction of bending stress on the part) until it reaches the termination at the outer edge of the MLCC (Figure 1).

Figure 1: Stress origin and direction on an MLCC during a convex bend

The 45°crack is the most commonly seen flex crack, but other flex cracks are possible, particularly if the part underwent especially severe bending.

Sometimes a discoloration of the dielectric is visible on the surface, although external visual detection of a flex crack is rare. This area will appear lighter in color than the normal dielectric.

Usually, the crack is only found once the part has undergone a DPA (Destructive Physical Analysis), also called a cross-sectioning (Figure 4).

Sometimes, if the MLCC’s termination is removed, the flex crack can be observed, if the crack has propagated the surface (Figure 5).

These cracks can sometimes be visible on the bottom of the MLCC (Figure 6).
During cases of severe board stress, cracks could form on both ends of the MLCC.

Figure 2: A cross section of an MLCC that cracked due to excess board flexure

Figure 3: Bottom of an MLCC, showing the origin of a flex crack.

Figure 4: Bottom of an MLCC with the termination removed. Cracks are visible at both ends.

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Question 4

Flex Crack Countermeasures (4): What happens to the MLCC (Multilayer Ceramic Chip Capacitor) once it is cracked?

Accepted Answer

A. Once a crack forms, this can allow moisture and contaminants to penetrate inside the component. If the crack crosses the active stack (the overlapping area of the electrodes) this can lead to a low electrical resistance path or “leaky short” developing over time. Once this low resistance path forms, this can cause further breakdown of the dielectric due to overheating. This overheating can lead to a true short circuit developing (Figure 1).

Figure 1: A diagram showing a typical 45° crack. The red electrodes are where the crack has passed through the active stack. This represents a risk for a short circuit.

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Question 5

Flex Crack Countermeasures (5): What are some common ways that flex cracking occurs?

Accepted Answer

A. Any activity that subjects the PCB to significant bending after the MLCCs have been soldered on the board risks cracking.

There are many ways in which a board could experience flexure, both during and after manufacturing.

PCBs frequently undergo a great amount of stress during depaneling. A few additional examples of ways in which a board could bend during the manufacturing process are: attaching connectors and wiring harnesses to connector sockets, sliding the boards into housings (without supporting the board), and screwing down the boards onto screw mounts.

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Question 6

Flex Crack Countermeasures (6): How can I detect a flex crack?

Accepted Answer

A. A flex crack is most frequently detected by electrical measurement as a decrease in insulation resistance. The MLCCs IR (Insulation Resistance) will decrease because the crack creates a weak point in the dielectric. Decreases in IR are usually detected by increases in leakage current.

A loss of capacitance or an increase in dissipation factor are also electrical indicators that a crack has occurred.

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Question 7

Flex Crack Countermeasures (7): How can I help prevent flex cracking?

Accepted Answer

A. The best way to prevent cracks is to ensure the board is not subjected to unnecessary external forces. Installing board stiffeners or supports can help prevent a board from bending. Board flexure during manufacturing can often be overlooked. Examining the manufacturing process can lead to finding ways reduce the stresses induced on the boards.

Additionally, part placement on the boards plays a large role in the amount of stress induced on the part during a bend. Placing parts farther away from depaneling planes and screw mounts can help prevent exposing MLCCs to unnecessary stress during manufacturing. Parts placed parallel to the depaneling planes will experience less stress (Figure 1).

Excess solder can lead to increased stress on MLCCs during bending. Care should be taken to use the soldering specifications provided by the manufacturer.

Figure 1: A diagram demonstrating that the stress on the capacitor during depaneling is greatest to least in the following order A > B = C > D > E.

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Question 8

Flex Crack Countermeasures (8): Does TDK offer any products providing solutions for flex cracking?

Accepted Answer

A. TDK has many flex cracking solutions including, Open Mode, Soft Termination, Serial Design, and MEGACAP.

Open Mode caps have an extended "L" gap (the distance between the termination and the electrode) as shown in Figures 1 and 2. This means that when the common 45° crack occurs, it will not travel through the active stack, and therefore will create an open circuit instead of a short circuit.

Figure 1: A diagram showing the "L" gap on a standard MLCC.

Figure 2: A diagram showing how the expanded "L" gap helps prevent a short circuit from flex cracking.

Figure 3: A diagram showing the location of the conductive resin layer (shown in green for emphasis).

TDK's Soft Termination MLCC's have a layer of conductive resin built into the termination (Figure 11). This layer of resin, located between the Cu and Ni layers, helps absorb mechanical stresses from bending and vibration to prevent a crack from occurring. When the part undergoes extreme bending, the termination is designed to separate from the resin before a crack develops.

Figure 4: A diagram showing the internal architecture of a serial design capacitor. A short has not occurred, even though the part has cracked.

TDK's Serial Design capacitors are effectively two capacitors in series, in a single ceramic body (Figure 12). These caps are designed to satisfy certain specifications for series caps on battery lines.

The two capacitors ensure that if one cracks, there still exists a second capacitor. This helps prevent a short circuit in the event of a crack. However, TDK's serial design is also equipped with Soft Termination. This helps prevent a crack in the first place.

Figure 5: A diagram showing the construction of a TDK MEGACAP.

TDK's MEGACAP is an MLCC with a metal lead frame available in single and stacked type (Figure 13). The metal leads absorb much of the stress from bending and vibrations.

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Question 9

Capacitor guide of ESD (1): What is ESD （Electro Static Discharge）?

Accepted Answer

A. Electrostatic discharge (ESD) is an uncontrolled high voltage spike that is very short in duration. A common example of ESD is the static electricity build up a person stores when walking across carpet. The discharge in this example occurs when the person touches metal or another person. ESD is typically in the thousands of volts range and can cause severe damage to electrical circuits.

ESD can come from human contact as well as machine interface contact. These two sources are the basis of the industry ESD models.

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Question 10

Capacitor guide of ESD (2): How can you protect against ESD?

Accepted Answer

A. The most common place to protect against ESD is at the interface sections of the circuit. This is where a connector is used to interface one module to another part of the system. Design Engineers typically use ceramic capacitors as ESD protection capacitors at connector pins and communication pins. The entire module may be subject to a module level ESD requirement while the capacitors may or may not also be required to meet a component level ESD requirement. The end customer is most concerned with the module level requirement since it is up to the Design Engineer to decide what component level requirements are needed to guarantee the module level requirements.

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Question 11

Capacitor guide of ESD (3): What are the ESD models?

Accepted Answer

A. There are several ESD models including charged device model (CDM), machine model (MM), and human body model (HBM). Of these, the HBM is most commonly used to test and rate capacitors.

The CDM is one of the most neglected models. This ESD event occurs when a device slides down a tube, bag, or similar source. This also can occur when connecting the device to a ground. A common discharge network consists of a 4 or 30pF capacitor.
MM: Similar to the HMB is the Machine Model. This model originated in Japan as a worst case HBM. The Machine Model simulates a discharge from some conductive material such as a metal frame or tool. An example of this can be found in the pins of an automatic tester. A common discharge network consists of 200pF capacitor, no resistor, and discharging through a 500nH series inductor.
The HBM is the oldest and most common form of ESD. As stated in Mil-Std 1686 section 5.2.1.1, the principal source of ESD damage is the human body, as modeled by the HBM standards. Although this is called the human body model, it really represents the discharge from the human body or any charged device into an ESD sensitive (ESDS) device. This is commonly represented as the discharge from a fingertip to the device.

The equivalent circuit as shown here contains a charged capacitor Co. When the switch is thrown, Co discharges through Rx into the Capacitor (Cx).

This model was introduced under MIL-STD 883 method 3015 where Co = 100pF and RX = 1.5kohm. Also commonly used is IEC 61000-4-2 where Co = 150pF and RX = 330 ohms. For AEC-Q200, Co = 150pF and RX = 2kohm. In addition to these, there are countless variations of the HBM ESD test.

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Question 12

Capacitor guide of ESD (4): What are some of the industry recognized ESD test specs?

Accepted Answer

A. There are a countless number of industry and customer specific ESD test specifications. There are specifications for the component level as well as the module level. Among all these specification, the most common include IEC 61000-4-2, MIL-STD 883 method 3015, JESD22-A114, and AEC-Q200.

These specifications vary in several parameters including the values within the discharge network, ESD voltage level increments, number of ESD pulses (strikes) per test, sequence of polarity, and charge/discharge sequence.

Many of these specifications also have their own ESD level classification system to indicate the degree of ESD sensitivity. The automotive AEC-Q200, for example, shows one of the higher levels with ESD testing up to 25kV.

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Question 13

Capacitor guide of ESD (5): How is the ESD test performed for TDK's MLCCs?

Accepted Answer

A. Based on our most prevalent customer requirements, TDK follows the AEC-Q200 as the typical ESD test method for passive components. Existing family qualifications are conducted with this method.

The AEC-Q200 starts at 6kV and follows a progressive voltage test scale based on a progression tree. In an ideal situation the progression would be 6kV, 12kV, 16kV, and 25kV. A single charge/discharge at each polarity is triggered at each voltage level. Virgin parts are allowed at each voltage. It should be noted that proper and complete discharge is critical in obtaining accurate ESD results.

The highest level passed represents the ESD classification level (ESD sensitivity) for the component being tested. This classification level helps the design engineer determine the right capacitor for their application.

IEC 61000-4-2 which is applicable for set and module evaluation is widely accepted also. TDK release ESD protection series witch can endure the most rigorous level (level-4:8000V) of ESD tests for contact discharge described under the IEC61000-4-2.

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Question 14

Capacitor guide of ESD (6): How does TDK recommend selecting the right capacitor for ESD?

Accepted Answer

A. Through experimentation, TDK has determined that there are three critical parameters that help the design engineer determine the best value for an ESD capacitor: voltage breakdown, capacitance, and DC bias.

Example of Vbd test results
Voltage breakdown is a test method used to quantify the voltage level strength of a capacitor. DC voltage is applied across the capacitor at a fixed voltage ramp rate (i.e. 100v/s) until the part fails. This determines the maximum sustained voltage the capacitor can withstand but does not directly indicate maximum ESD voltage level.
The DUT effect refers to the effective resultant voltage seen across the capacitor under test (DUT) in the ESD test circuit.

Nodal analysis shows that the relationship between the resultant voltage (VX) across the DUT (CX) as

By keeping the source voltage (VO) and charge capacitor (CO) constant, the relationship between resultant voltage (VX) and the DUT capacitor (CX) are inversely proportional. This means that as you select a higher value CX, VX decreases.

To illustrate the DUT effect, take as an example a 4kV (VO) ESD requirement for a 1000pF capacitor (CX). Also assume we are using the AEC-Q200 test method which uses CO = 150pF. The DUT effect relationship shows that with 4kV applied, CX only sees 521.7V (VX).
When DC voltage is applied to a ceramic capacitor, the effective capacitance may be different from the nominal capacitance. DC Bias is typically expressed in percent capacitance change from nominal.

DC Bias is largely due to the dielectric material. Of course other design and construction factors play a role as well. For Class I dielectrics such as C0G, the change is relatively flat. For Class II such as X7R and X5R, you may see a slight increase in capacitance initially which is immediately followed by a steady decrease as you approach the rated capacitance. Typically for Class II dielectrics, the DC bias is between -10% to -70%.

As the applied voltage increases, effective capacitance decreases. DC bias is repeatable and does not have any destructive effect on the performance or life of the capacitor as long as you do not exceed the rated voltage.

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Question 15

Capacitor guide of ESD (7): How can I choose an ESD protection capacitor?

Accepted Answer

A. The first step is to confirm how much ESD protection is required. Keep in mind that a 12ꯠV module level requirement does not mean that the component requirement is also 12ꯠV. In many cases, the end customer sets a module level ESD requirement and lets the Design Engineer decide what component level requirements are necessary to meet the module level ESD.

ESD test rating alone is not the best way to select a capacitor value. Without looking at Vbd, DUT, and DC Bias affects, the Design Engineer could over-design or even under-design the protection circuit.

The relationship between the resultant voltage (Vx) across the capacitance (Cx)

As discussed earlier, DC bias causes a reduction in capacitance as much as 70% for Class II MLCCs. If we assume this as worst case,

This relationship tells us how much voltage (Vx) our capacitor (Cx) will really see. Therefore we make our capacitor selection by choosing a capacitor with the voltage breakdown level (Vbd) greater than Vx.

Vbd > Vx, where

Figure 1: Example of Vbd test results

For example, assume CO = 150pF, Cx = 1000pF and VESD = 12kV as we have been using in our previous examples. This results in a minimum Vbd of 4000V. The 1000pF capacitor we chose for Cx must have a minimum Vbd level of 4000V.

If we refer back to the example Vbd chart from question 10 above, we see that the average Vbd level is 4520V and the minimum is 4080V for this capacitor and therefore is a suitable choice.

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Question 16

Capacitor guide of ESD (8): Does TDK have any recommendable MLCCs which are useful for ESD protection?

Accepted Answer

A. TDK has developed the CGA3EA series for ESD circuit protection purposes. This series is designed to be used in the input-output sections of various in-vehicle applications such as ECUs, keyless entry systems, and car navigation systems. This series is available exclusively in automotive (Q200 compliant) quality, and has passed the most rigorous level (level 4-8000V) of ESD tests under the IEC61000-4-2 international standard.

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Question 17

Capacitor guide of ESD (9): What are some resources to learn more about ESD?

Accepted Answer

A. There are many resources to learn more about ESD and ESD testing requirements. Most of the references used in this paper focused on industry test methods. The following list of specifications and websites are a good place to start.

Mil-Std 1686 Mil-Std 883 method 3015

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Question 18

MLCC (Multilayer Ceramic Capacitor) Voltage Strength

Accepted Answer

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