Chip Varistors / Ceramic Transient Voltage Suppressors
AVRL061FR50ETA
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Size
| Length(L) |
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| Width(W) |
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| Thickness | Height |
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| Terminal Width(B) |
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| Recommended Land Pattern (PA) |
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| Recommended Land Pattern (PB) |
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| Recommended Land Pattern (PC) |
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Electrical Characteristics
| Varistor Voltage (Nom.) @ 1mA |
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| Maximum Operating Voltage [DC] |
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Capacitance (Typ.)
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| Maximum Clamping Voltage [8/20μs] |
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| Maximum Surge Current [8/20μs] |
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ESD Clamping Voltage [2kV]
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ESD Clamping Voltage [8kV]
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| Energy Absorption |
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Other
| Operating Temperature Range |
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| Soldering Method |
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| AEC-Q200 (Environment) |
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| AEC-Q200 Electrical Transient Conduction (Pulse1) |
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| AEC-Q200 Electrical Transient Conduction (Pulse2a) |
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| AEC-Q200 Electrical Transient Conduction (Pulse2b) |
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| AEC-Q200 Electrical Transient Conduction (Pulse3a) |
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| AEC-Q200 Electrical Transient Conduction (Pulse3b) |
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| AEC-Q200 ESD |
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| Packing |
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| Package Quantity |
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| Weight per pc |
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Tech Info
Documents
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[Application Note] Recommended Products for Use with Class-D Amplifiers (Noise Suppression Filters, Inductors for LPFs, Chip Varistors)New
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[Solution Guide] TDMA Noise Countermeasures, Reception Sensitivity Improvement, and ESD (Electrostatic Discharge) Countermeasures in Microphone Lines, Using Noise Suppression Filters and Chip VaristorsNew
Technical Support Tools
3rd Party ECAD models
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SnapMagic
Characteristic Graph
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